Design of Matrix Inversion Algorithm Based on Field Programmable Gate Array

Guo-chen AN , Ruo-fan LIU , Man ZHAO , Yu-xin YUAN , Xiao-jun WANG

Science Technology and Engineering ›› 2024, Vol. 24 ›› Issue (10) : 4140 -4147.

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Science Technology and Engineering ›› 2024, Vol. 24 ›› Issue (10) : 4140-4147 DOI: 10.12404/j.issn.1671-1815.2304166
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Design of Matrix Inversion Algorithm Based on Field Programmable Gate Array
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Abstract

Because the adaptive anti-jamming algorithm has a time delay when updating the optimal weight, it is difficult to meet the weight update rate requirements in a dynamic environment. In view of this situation, scholars have studied how to implement the fast sampling matrix inversion algorithm, but there is still a problem that it is only applicable to low-dimensional matrices and the weight update rate is slow. In order to solve the above problems, a sampling matrix inversion algorithm implementation architecture based on Cholesky decomposition was proposed. The implementation architecture mainly includes a covariance matrix calculation module, a Cholesky decomposition module, an inverse matrix module for calculating the lower triangular matrix L, a triangular matrix multiplication and weight calculation module. This design adopts a pipeline and state machine implementation structure, which effectively solves the problem of slow weight update rate caused by the large inverse operation of the high-order sampling matrix. The simulation results show that on the hardware platform of field programmable gate array (FPGA), for the 56-order sampling matrix, the update time of a weight only needs 1.2 ms under the working frequency of 100 MHz. The implementation architecture proposed in this article provides a practical and feasible solution for adaptive anti-jamming to quickly solve weight values, and has certain reference value for weight solving systems with similar requirements.

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Guo-chen AN, Ruo-fan LIU, Man ZHAO, Yu-xin YUAN, Xiao-jun WANG. Design of Matrix Inversion Algorithm Based on Field Programmable Gate Array. Science Technology and Engineering, 2024, 24(10): 4140-4147 DOI:10.12404/j.issn.1671-1815.2304166

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